// Copyright 2017 The Go Authors. All rights reserved.
// Use of this source code is governed by a BSD-style
// license that can be found in the LICENSE file.

// +build 386 amd64

package cpu

const CacheLinePadSize = 64

// cpuid is implemented in cpu_x86.s.
func cpuid(,  uint32) (, , ,  uint32)

// xgetbv with ecx = 0 is implemented in cpu_x86.s.
func xgetbv() (,  uint32)

const (
	// edx bits
	cpuid_SSE2 = 1 << 26

	// ecx bits
	cpuid_SSE3      = 1 << 0
	cpuid_PCLMULQDQ = 1 << 1
	cpuid_SSSE3     = 1 << 9
	cpuid_FMA       = 1 << 12
	cpuid_SSE41     = 1 << 19
	cpuid_SSE42     = 1 << 20
	cpuid_POPCNT    = 1 << 23
	cpuid_AES       = 1 << 25
	cpuid_OSXSAVE   = 1 << 27
	cpuid_AVX       = 1 << 28

	// ebx bits
	cpuid_BMI1 = 1 << 3
	cpuid_AVX2 = 1 << 5
	cpuid_BMI2 = 1 << 8
	cpuid_ERMS = 1 << 9
	cpuid_ADX  = 1 << 19
)

var maxExtendedFunctionInformation uint32

func doinit() {
	options = []option{
		{Name: "adx", Feature: &X86.HasADX},
		{Name: "aes", Feature: &X86.HasAES},
		{Name: "avx", Feature: &X86.HasAVX},
		{Name: "avx2", Feature: &X86.HasAVX2},
		{Name: "bmi1", Feature: &X86.HasBMI1},
		{Name: "bmi2", Feature: &X86.HasBMI2},
		{Name: "erms", Feature: &X86.HasERMS},
		{Name: "fma", Feature: &X86.HasFMA},
		{Name: "pclmulqdq", Feature: &X86.HasPCLMULQDQ},
		{Name: "popcnt", Feature: &X86.HasPOPCNT},
		{Name: "sse3", Feature: &X86.HasSSE3},
		{Name: "sse41", Feature: &X86.HasSSE41},
		{Name: "sse42", Feature: &X86.HasSSE42},
		{Name: "ssse3", Feature: &X86.HasSSSE3},

		// These capabilities should always be enabled on amd64:
		{Name: "sse2", Feature: &X86.HasSSE2, Required: GOARCH == "amd64"},
	}

	, , ,  := cpuid(0, 0)

	if  < 1 {
		return
	}

	maxExtendedFunctionInformation, _, _, _ = cpuid(0x80000000, 0)

	, , ,  := cpuid(1, 0)
	X86.HasSSE2 = isSet(, cpuid_SSE2)

	X86.HasSSE3 = isSet(, cpuid_SSE3)
	X86.HasPCLMULQDQ = isSet(, cpuid_PCLMULQDQ)
	X86.HasSSSE3 = isSet(, cpuid_SSSE3)
	X86.HasSSE41 = isSet(, cpuid_SSE41)
	X86.HasSSE42 = isSet(, cpuid_SSE42)
	X86.HasPOPCNT = isSet(, cpuid_POPCNT)
	X86.HasAES = isSet(, cpuid_AES)

	// OSXSAVE can be false when using older Operating Systems
	// or when explicitly disabled on newer Operating Systems by
	// e.g. setting the xsavedisable boot option on Windows 10.
	X86.HasOSXSAVE = isSet(, cpuid_OSXSAVE)

	// The FMA instruction set extension only has VEX prefixed instructions.
	// VEX prefixed instructions require OSXSAVE to be enabled.
	// See Intel 64 and IA-32 Architecture Software Developer’s Manual Volume 2
	// Section 2.4 "AVX and SSE Instruction Exception Specification"
	X86.HasFMA = isSet(, cpuid_FMA) && X86.HasOSXSAVE

	 := false
	// For XGETBV, OSXSAVE bit is required and sufficient.
	if X86.HasOSXSAVE {
		,  := xgetbv()
		// Check if XMM and YMM registers have OS support.
		 = isSet(, 1<<1) && isSet(, 1<<2)
	}

	X86.HasAVX = isSet(, cpuid_AVX) && 

	if  < 7 {
		return
	}

	, , ,  := cpuid(7, 0)
	X86.HasBMI1 = isSet(, cpuid_BMI1)
	X86.HasAVX2 = isSet(, cpuid_AVX2) && 
	X86.HasBMI2 = isSet(, cpuid_BMI2)
	X86.HasERMS = isSet(, cpuid_ERMS)
	X86.HasADX = isSet(, cpuid_ADX)
}

func isSet( uint32,  uint32) bool {
	return & != 0
}

// Name returns the CPU name given by the vendor.
// If the CPU name can not be determined an
// empty string is returned.
func () string {
	if maxExtendedFunctionInformation < 0x80000004 {
		return ""
	}

	 := make([]byte, 0, 3*4*4)

	var , , ,  uint32
	, , ,  = cpuid(0x80000002, 0)
	 = appendBytes(, , , , )
	, , ,  = cpuid(0x80000003, 0)
	 = appendBytes(, , , , )
	, , ,  = cpuid(0x80000004, 0)
	 = appendBytes(, , , , )

	// Trim leading spaces.
	for len() > 0 && [0] == ' ' {
		 = [1:]
	}

	// Trim tail after and including the first null byte.
	for ,  := range  {
		if  == '\x00' {
			 = [:]
			break
		}
	}

	return string()
}

func appendBytes( []byte,  ...uint32) []byte {
	for ,  := range  {
		 = append(,
			byte(( >> 0)),
			byte(( >> 8)),
			byte(( >> 16)),
			byte(( >> 24)))
	}
	return 
}